Invalid register operand when updating

Tyrel Processor Reference Guide Embedded Development Kit EDK 14.1 UG081 (v14.1) Micro Blaze Processor Reference Guide (v14.1) Notice of Disclaimer The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products.

When using wdc.flush in a loop to flush the entire cache, the loop can be optimized by using Ra as the cache base address and Rb as the loop counter: addik r5,r0, C_DCACHE_BASEADDR addik r6,r0, C_DCACHE_BYTE_SIZE-C_DCACHE_LINE_LEN*4 loop: wdc.flush r5,r6 bgtid r6,loop addik r6,r6,-C_DCACHE_LINE_LEN*4 When using wdc.clear in a loop to invalidate a memory area in the cache, the loop can be optimized by using Ra as the memory area base address and Rb as the loop counter: addik r5,r0,memory_area_base_address addik r6,r0,memory_area_byte_size-C_DCACHE_LINE_LEN*4 loop: wdc.clear r5,r6 bgtid r6,loop addik r6,r6,-C_DCACHE_LINE_LEN*4 Micro Blaze Processor Reference Guide UG081 (v14.1) Instructions wic Write to Instruction Cache Description Write into the instruction cache tag to invalidate a cache line. Register r A contains the address of the affected cache line.

The contents of register r A are XOR’ed with the extended IMM field; the result is placed into register r D.

Pseudocode (r D) ÷ (r A) © (r B) Registers Altered - r D Latency - 1 cycle xor r D, r A, r B 1 0 0 0 1 0 r D r A r B 0 0 0 0 0 0 0 0 0 0 0 0 6 1 1 1 6 2 1 3 1 Micro Blaze Processor Reference Guide UG081 (v14.1) Instructions xori Logical Exclusive OR with Immediate Description The IMM field is extended to 32 bits by concatenating 16 0-bits on the left.

- Embedded System Tools Reference Manual (UG111) - Platform Specification Format Reference Manual (UG642) - XPS Help - SDK Help - Power PC 405 Processor Reference Guide (UG011) Additional Resources The following lists some of the resources you can access directly using the provided URLs.

You can also access the entire documentation set online at - EDK Concepts, Tools, and Techniques (UG683) Note: The accompanying design files are in edk_

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